
use crate::metadata::ir::*;
pub(crate) static REGISTERS: IR = IR {
    blocks: &[Block {
        name: "Pwr",
        extends: None,
        description: Some("Power control"),
        items: &[
            BlockItem {
                name: "cr1",
                description: Some("Power control register 1"),
                array: None,
                byte_offset: 0x0,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cr1"),
                }),
            },
            BlockItem {
                name: "cr2",
                description: Some("Power control register 2"),
                array: None,
                byte_offset: 0x4,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cr2"),
                }),
            },
            BlockItem {
                name: "cr3",
                description: Some("Power control register 3"),
                array: None,
                byte_offset: 0x8,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cr3"),
                }),
            },
            BlockItem {
                name: "cr4",
                description: Some("Power control register 4"),
                array: None,
                byte_offset: 0xc,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cr4"),
                }),
            },
            BlockItem {
                name: "sr1",
                description: Some("Power status register 1"),
                array: None,
                byte_offset: 0x10,
                inner: BlockItemInner::Register(Register {
                    access: Access::Read,
                    bit_size: 32,
                    fieldset: Some("Sr1"),
                }),
            },
            BlockItem {
                name: "sr2",
                description: Some("Power status register 2"),
                array: None,
                byte_offset: 0x14,
                inner: BlockItemInner::Register(Register {
                    access: Access::Read,
                    bit_size: 32,
                    fieldset: Some("Sr2"),
                }),
            },
            BlockItem {
                name: "scr",
                description: Some("Power status clear register"),
                array: None,
                byte_offset: 0x18,
                inner: BlockItemInner::Register(Register {
                    access: Access::Write,
                    bit_size: 32,
                    fieldset: Some("Scr"),
                }),
            },
            BlockItem {
                name: "cr5",
                description: Some("Power control register 5"),
                array: None,
                byte_offset: 0x1c,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Cr5"),
                }),
            },
            BlockItem {
                name: "pucr",
                description: Some("Power Port pull-up control register"),
                array: Some(Array::Regular(RegularArray { len: 8, stride: 8 })),
                byte_offset: 0x20,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Pcr"),
                }),
            },
            BlockItem {
                name: "pdcr",
                description: Some("Power Port pull-down control register"),
                array: Some(Array::Regular(RegularArray { len: 8, stride: 8 })),
                byte_offset: 0x24,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Pcr"),
                }),
            },
            BlockItem {
                name: "c2cr1",
                description: Some("Power CPU2 control register 1 [dual core device only]"),
                array: None,
                byte_offset: 0x80,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("C2cr1"),
                }),
            },
            BlockItem {
                name: "c2cr3",
                description: Some("Power CPU2 control register 3 [dual core device only]"),
                array: None,
                byte_offset: 0x84,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("C2cr3"),
                }),
            },
            BlockItem {
                name: "extscr",
                description: Some("Power extended status and status clear register"),
                array: None,
                byte_offset: 0x88,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Extscr"),
                }),
            },
            BlockItem {
                name: "seccfgr",
                description: Some("Power security configuration register [dual core device only]"),
                array: None,
                byte_offset: 0x8c,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Seccfgr"),
                }),
            },
            BlockItem {
                name: "subghzspicr",
                description: Some("Power SPI3 control register"),
                array: None,
                byte_offset: 0x90,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Subghzspicr"),
                }),
            },
            BlockItem {
                name: "rsscmdr",
                description: Some("RSS Command register [dual core device only]"),
                array: None,
                byte_offset: 0x98,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Rsscmdr"),
                }),
            },
        ],
    }],
    fieldsets: &[
        FieldSet {
            name: "C2cr1",
            extends: None,
            description: Some("Power CPU2 control register 1 [dual core device only]"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "lpms",
                    description: Some("Low-power mode selection for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 3,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "fpdr",
                    description: Some("Flash memory power down mode during LPRun for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "fpds",
                    description: Some("Flash memory power down mode during LPSleep for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "C2cr3",
            extends: None,
            description: Some("Power CPU2 control register 3 [dual core device only]"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "ewup",
                    description: Some("Enable Wakeup pin WKUP1 for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: Some(Array::Regular(RegularArray { len: 3, stride: 1 })),
                    enumm: None,
                },
                Field {
                    name: "ewpvd",
                    description: Some("Enable wakeup PVD for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "apc",
                    description: Some("Apply pull-up and pull-down configuration for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ewrfbusy",
                    description: Some("EWRFBUSY"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ewrfirq",
                    description: Some("akeup for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eiwul",
                    description: Some("Enable internal wakeup line for CPU2"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Cr1",
            extends: None,
            description: Some("Power control register 1"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "lpms",
                    description: Some("Low-power mode selection for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 3,
                    array: None,
                    enumm: Some("Lpms"),
                },
                Field {
                    name: "subghzspinsssel",
                    description: Some("sub-GHz SPI NSS source select"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Subghzspinsssel"),
                },
                Field {
                    name: "fpdr",
                    description: Some("Flash memory power down mode during LPRun for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Fpdr"),
                },
                Field {
                    name: "fpds",
                    description: Some("Flash memory power down mode during LPSleep for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Fpds"),
                },
                Field {
                    name: "dbp",
                    description: Some("Disable backup domain write protection"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "vos",
                    description: Some("Voltage scaling range selection"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 2,
                    array: None,
                    enumm: Some("Vos"),
                },
                Field {
                    name: "lpr",
                    description: Some("Low-power run"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Lpr"),
                },
            ],
        },
        FieldSet {
            name: "Cr2",
            extends: None,
            description: Some("Power control register 2"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "pvde",
                    description: Some("Power voltage detector enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "pls",
                    description: Some("Power voltage detector level selection."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 3,
                    array: None,
                    enumm: Some("Pls"),
                },
                Field {
                    name: "pvme",
                    description: Some("Peripheral voltage monitoring 3 enable: VDDA vs. 1.62V"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Cr3",
            extends: None,
            description: Some("Power control register 3"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "ewup",
                    description: Some("Enable Wakeup pin WKUP1 for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: Some(Array::Regular(RegularArray { len: 3, stride: 1 })),
                    enumm: None,
                },
                Field {
                    name: "eulpen",
                    description: Some("Ultra-low-power enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ewpvd",
                    description: Some("Enable wakeup PVD for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "rrs",
                    description: Some("SRAM2 retention in Standby mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "apc",
                    description: Some("Apply pull-up and pull-down configuration from CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ewrfbusy",
                    description: Some("Enable Radio BUSY Wakeup from Standby for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ewrfirq",
                    description: Some("Wakeup for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ec2h",
                    description: Some("nable CPU2 Hold interrupt for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "eiwul",
                    description: Some("Enable internal wakeup line for CPU1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Cr4",
            extends: None,
            description: Some("Power control register 4"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "wp",
                    description: Some("Wakeup pin WKUP1 polarity"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: Some(Array::Regular(RegularArray { len: 3, stride: 1 })),
                    enumm: Some("Wp"),
                },
                Field {
                    name: "vbe",
                    description: Some("VBAT battery charging enable"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "vbrs",
                    description: Some("VBAT battery charging resistor selection"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Vbrs"),
                },
                Field {
                    name: "wrfbusyp",
                    description: Some("Wakeup Radio BUSY polarity"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c2boot",
                    description: Some("oot CPU2 after reset or wakeup from Stop or Standby modes."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Cr5",
            extends: None,
            description: Some("Power control register 5"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "rfeolen",
                    description: Some("Enable Radio End Of Life detector enabled"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "smpsen",
                    description: Some("Enable SMPS Step Down converter SMPS mode enabled."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Extscr",
            extends: None,
            description: Some("Power extended status and status clear register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "c1cssf",
                    description: Some("Clear CPU1 Stop Standby flags"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c2cssf",
                    description: Some("lear CPU2 Stop Standby flags"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c1sbf",
                    description: Some("System Standby flag for CPU1. (no core states retained)"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c1stop2f",
                    description: Some("System Stop2 flag for CPU1. (partial core states retained)"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c1stopf",
                    description: Some("System Stop0, 1 flag for CPU1. (All core states retained)"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c2sbf",
                    description: Some("ystem Standby flag for CPU2. (no core states retained)"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c2stop2f",
                    description: Some("ystem Stop2 flag for CPU2. (partial core states retained)"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c2stopf",
                    description: Some("ystem Stop0, 1 flag for CPU2. (All core states retained)"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c1ds",
                    description: Some("CPU1 deepsleep mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: Some("Cds"),
                },
                Field {
                    name: "c2ds",
                    description: Some("PU2 deepsleep mode"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Pcr",
            extends: None,
            description: Some("Power Port pull control register"),
            bit_size: 32,
            fields: &[Field {
                name: "p",
                description: Some("Port pull bit y (y=0..15)"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 1,
                array: Some(Array::Regular(RegularArray { len: 16, stride: 1 })),
                enumm: None,
            }],
        },
        FieldSet {
            name: "Rsscmdr",
            extends: None,
            description: Some("RSS Command register [dual core device only]"),
            bit_size: 32,
            fields: &[Field {
                name: "rsscmd",
                description: Some("RSS command"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 8,
                array: None,
                enumm: None,
            }],
        },
        FieldSet {
            name: "Scr",
            extends: None,
            description: Some("Power status clear register"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "cwuf",
                    description: Some("Clear wakeup flag 1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: Some(Array::Regular(RegularArray { len: 3, stride: 1 })),
                    enumm: None,
                },
                Field {
                    name: "cwpvdf",
                    description: Some("Clear wakeup PVD interrupt flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "cwrfbusyf",
                    description: Some("Clear wakeup Radio BUSY flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "cc2hf",
                    description: Some("lear CPU2 Hold interrupt flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Seccfgr",
            extends: None,
            description: Some("Power security configuration register [dual core device only]"),
            bit_size: 32,
            fields: &[Field {
                name: "c2ewila",
                description: Some("wakeup on CPU2 illegal access interrupt enable"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                bit_size: 1,
                array: None,
                enumm: None,
            }],
        },
        FieldSet {
            name: "Sr1",
            extends: None,
            description: Some("Power status register 1"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "wuf",
                    description: Some("Wakeup flag 1"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: Some(Array::Regular(RegularArray { len: 3, stride: 1 })),
                    enumm: None,
                },
                Field {
                    name: "wpvdf",
                    description: Some("Wakeup PVD flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "wrfbusyf",
                    description: Some("Radio BUSY wakeup flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "c2hf",
                    description: Some("PU2 Hold interrupt flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "wufi",
                    description: Some("Internal wakeup interrupt flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Sr2",
            extends: None,
            description: Some("Power status register 2"),
            bit_size: 32,
            fields: &[
                Field {
                    name: "c2boots",
                    description: Some("PU2 boot/wakeup request source information"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "rfbusys",
                    description: Some("Radio BUSY signal status"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "rfbusyms",
                    description: Some("Radio BUSY masked signal status"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "smpsrdy",
                    description: Some("SMPS ready flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "ldordy",
                    description: Some("LDO ready flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "rfeolf",
                    description: Some("Radio end of life flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "regmrs",
                    description: Some("regulator2 low power flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "flashrdy",
                    description: Some("Flash ready"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "reglps",
                    description: Some("regulator1 started"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "reglpf",
                    description: Some("regulator1 low power flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "vosf",
                    description: Some("Voltage scaling flag"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "pvdo",
                    description: Some("Power voltage detector output"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "pvmo",
                    description: Some("Peripheral voltage monitoring output: VDDA vs. 1.62 V"),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
            ],
        },
        FieldSet {
            name: "Subghzspicr",
            extends: None,
            description: Some("Power SPI3 control register"),
            bit_size: 32,
            fields: &[Field {
                name: "nss",
                description: Some("sub-GHz SPI NSS control"),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                bit_size: 1,
                array: None,
                enumm: None,
            }],
        },
    ],
    enums: &[
        Enum {
            name: "Cds",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "RUNNING_OR_SLEEP",
                    description: Some("CPU is running or in sleep"),
                    value: 0,
                },
                EnumVariant {
                    name: "DEEP_SLEEP",
                    description: Some("CPU is in Deep-Sleep"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Fpdr",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "IDLE",
                    description: Some("Flash memory in Idle mode when system is in LPRun mode"),
                    value: 0,
                },
                EnumVariant {
                    name: "POWER_DOWN",
                    description: Some("Flash memory in Power-down mode when system is in LPRun mode"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Fpds",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "IDLE",
                    description: Some("Flash memory in Idle mode when system is in LPSleep mode"),
                    value: 0,
                },
                EnumVariant {
                    name: "POWER_DOWN",
                    description: Some("Flash memory in Power-down mode when system is in LPSleep mode"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Lpms",
            description: None,
            bit_size: 3,
            variants: &[
                EnumVariant {
                    name: "STOP0",
                    description: Some("Stop 0 mode"),
                    value: 0,
                },
                EnumVariant {
                    name: "STOP1",
                    description: Some("Stop 1 mode"),
                    value: 1,
                },
                EnumVariant {
                    name: "STOP2",
                    description: Some("Stop 2 mode"),
                    value: 2,
                },
                EnumVariant {
                    name: "STANDBY",
                    description: Some("Standby mode"),
                    value: 3,
                },
                EnumVariant {
                    name: "SHUTDOWN",
                    description: Some("Shutdown mode"),
                    value: 4,
                },
            ],
        },
        Enum {
            name: "Lpr",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "MAIN_MODE",
                    description: Some("Voltage regulator in Main mode in Low-power run mode"),
                    value: 0,
                },
                EnumVariant {
                    name: "LOW_POWER_MODE",
                    description: Some("Voltage regulator in low-power mode in Low-power run mode"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Pls",
            description: None,
            bit_size: 3,
            variants: &[
                EnumVariant {
                    name: "V2_0",
                    description: Some("2.0V"),
                    value: 0,
                },
                EnumVariant {
                    name: "V2_2",
                    description: Some("2.2V"),
                    value: 1,
                },
                EnumVariant {
                    name: "V2_4",
                    description: Some("2.4V"),
                    value: 2,
                },
                EnumVariant {
                    name: "V2_5",
                    description: Some("2.5V"),
                    value: 3,
                },
                EnumVariant {
                    name: "V2_6",
                    description: Some("2.6V"),
                    value: 4,
                },
                EnumVariant {
                    name: "V2_8",
                    description: Some("2.8V"),
                    value: 5,
                },
                EnumVariant {
                    name: "V2_9",
                    description: Some("2.9V"),
                    value: 6,
                },
                EnumVariant {
                    name: "EXTERNAL",
                    description: Some("External input analog voltage PVD_IN (compared internally to VREFINT)"),
                    value: 7,
                },
            ],
        },
        Enum {
            name: "Subghzspinsssel",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "SUBGHZSPICR",
                    description: Some(
                        "sub-GHz SPI NSS signal driven from PWR_SUBGHZSPICR.NSS (RFBUSYMS functionality enabled)",
                    ),
                    value: 0,
                },
                EnumVariant {
                    name: "LPTIM3",
                    description: Some(
                        "sub-GHz SPI NSS signal driven from LPTIM3_OUT (RFBUSYMS functionality disabled)",
                    ),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Vbrs",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "R5K",
                    description: Some("VBAT charging through a 5 kΩ resistor"),
                    value: 0,
                },
                EnumVariant {
                    name: "R1_5K",
                    description: Some("VBAT charging through a 1.5 kΩ resistor"),
                    value: 1,
                },
            ],
        },
        Enum {
            name: "Vos",
            description: None,
            bit_size: 2,
            variants: &[
                EnumVariant {
                    name: "RANGE1",
                    description: Some("1.2 V (range 1)"),
                    value: 1,
                },
                EnumVariant {
                    name: "RANGE2",
                    description: Some("1.0 V (range 2)"),
                    value: 2,
                },
            ],
        },
        Enum {
            name: "Wp",
            description: None,
            bit_size: 1,
            variants: &[
                EnumVariant {
                    name: "RISING_EDGE",
                    description: Some("Detection on high level (rising edge)"),
                    value: 0,
                },
                EnumVariant {
                    name: "FALLING_EDGE",
                    description: Some("Detection on low level (falling edge)"),
                    value: 1,
                },
            ],
        },
    ],
};
